Patent · US Active

Method and system of copying a memory area between processor elements for lock-step execution

US7933966B2 · kind B2 · utility

1Cited by
28References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 26, 2005
Grant dateApr 26, 2011
Priority date
Expiry dateFeb 24, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/185
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and system of copying a memory area between processor elements for lock-step execution. At least some of the illustrative embodiments may be a method comprising executing duplicate copies of a first program in a first processor of a first multiprocessor computer system and in a first processor of a second multiprocessor computer system (the executing substantially in lock-step), executing a second program in a second processor element of the first multiprocessor computer system (the first and second processors of the first multiprocessor computer system sharing an input/output (I/O) bridge), copying a memory area of the second program executing in the second processor element of the first multiprocessor computer system to a memory of a second processor element in the second multiprocessor computer system while the duplicate copies of the first program are executing in the first processor elements, and then executing duplicate copies of the second program in the second processors in lock-step.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.