Prefix matching structure and method for fast packet switching
US7934198B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2004 |
| Grant date | Apr 26, 2011 |
| Priority date | — |
| Expiry date | Nov 21, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2101/604
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A prefix matching apparatus for directing information to a destination port includes a memory configured to store a piece of data including an address and a plurality of levels each including a plurality of memory locations, the levels each representing a unique address space. A controller is coupled to the memory and to the plurality of levels, and is configured to read the data address and to direct the data to the next level associated with a unique address space associated with the data address. In one embodiment, the controller is configured to match the data address prefix to a plurality of addresses associated with the unique address spaces. Advantages of the invention include fast switch decisions and low switch latency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.