High-impedance substrate
US7936310B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2008 |
| Grant date | May 3, 2011 |
| Priority date | — |
| Expiry date | Oct 27, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01Q15/008
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A high-impedance substrate is provided, which includes a metallic plate employed as a ground plane, a resonance circuit layer spaced away from the metallic plate by a distance “t”, the resonance circuit layer being provided with at least two resonance circuits having the same height and disposed side by side with a distance “g”, a connecting component connecting the resonance circuit with the metallic plate, and a magnetic material layer interposed between the metallic plate and the resonance circuit layer. The distance “t” between the metallic plate and the resonance circuit layer is confined within the range of 0.1 to 10 mm, the distance “g” between neighboring resonance circuits is confined within the range of 0.01 to 5 mm, the distance “h” between the magnetic material layer and the resonance circuit layer is confined within the range represented by the following inequality 1:g/2≦h≦t/2 inequality 1.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.