Method and mechanism for implementing automated PCB routing
US7937681B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2005 |
| Grant date | May 3, 2011 |
| Priority date | — |
| Expiry date | Jan 17, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system that converges on a global solution to a PCB routing problem using iterations of topology-based routing is described. In some embodiments, the geometric design space is abstracted into a topological graph representing the routing problem. Then, each net is allowed to find its optimal solution path independent of the solution paths for all other nets. The electrical and physical constraints of the system are initially ignored or greatly relaxed. Over each design iteration, the constraints are tightened until a complete, global, topological solution is found. Once a topological solution is found, it is converted into a geometric solution. In the event that no geometric solution exists for that topological solution, then the iteration process is resumed taking into consideration this additional information. The result is the ability to quickly autoroute highly-constrained PCB designs with minimal operator input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.