Clocking analog components operating in a digital system
US7940202B1 · kind B1 · utility
3Cited by
23References
18Claims
0Family size
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Key dates
| Filing date | Jul 31, 2009 |
| Grant date | May 10, 2011 |
| Priority date | — |
| Expiry date | Jul 31, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/66
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one example, a clock generation component is configured to receive a master clock and generate a plurality of clock signals that are shifted relative to one another for a chip having an analog domain and a digital domain. A first selection component is configured to select a first one of the generated clock signals and drive the digital domain according to the first clock signal. A second selection component is configured to select a second one of the generated clock signals that is shifted relative to the first clock signal currently used to drive the digital domain for driving an analog component of the analog domain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.