Communication node architecture in a globally asynchronous network on chip system
US7940666B2 · kind B2 · utility
2Cited by
4References
28Claims
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Key dates
| Filing date | Mar 8, 2006 |
| Grant date | May 10, 2011 |
| Priority date | — |
| Expiry date | Jun 19, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/56
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A network and a data transmission method between elements in such a network using an asynchronous communication protocol of the “send/accept” type. At least one node in the network operations without an internal clock, this node determining a transfer hierarchy between two data packets to be routed to the same output, at least as a function of a priority channel information associated with each data packet.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.