Ultra low-loss CMOS compatible silicon waveguides
US7941023B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2007 |
| Grant date | May 10, 2011 |
| Priority date | — |
| Expiry date | Apr 27, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B2006/12097
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A low loss optical waveguiding structure for silicon-on-insulator (SOI)-based arrangements utilizes a tri-material configuration including a rib/strip waveguide formed of a material with a refractive index less than silicon, but greater than the refractive index of the underlying insulating material. In one arrangement, silicon nitride may be used. The index mismatch between the silicon surface layer (the SOI layer) and the rib/strip waveguide results in a majority of the optical energy remaining within the SOI layer, thus reducing scattering losses from the rib/strip structure (while the rib/strip allows for guiding along a desired signal path to be followed). Further, since silicon nitride is an amorphous material without a grain structure, this will also reduce scattering losses. Advantageously, the use of silicon nitride allows for conventional CMOS fabrication processes to be used in forming both passive and active devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.