Scheduling system and method in a hierarchical temporal memory based system
US7941392B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 28, 2007 |
| Grant date | May 10, 2011 |
| Priority date | — |
| Expiry date | Dec 10, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N20/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one aspect of one or more embodiments of the present invention, a system comprises: an HTM network executable at least in part on multiple node processing units (NPUs). In one embodiment the NPUs include one or more nodes, each of which can be executed by its NPU. In one embodiment, the present invention includes a technique for coordinating and scheduling HTM computation across one or more CPUs which (1) enables concurrent computation (2) does not require a central point of control (e.g. a controller entity that “orchestrates” the computation), (3) does not require global synchronization, (4) in some embodiments ensures that the same results are achieved whether the nodes are executed in parallel or serially.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.