Compilation model for processing hierarchical data in stream systems
US7941460B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 2007 |
| Grant date | May 10, 2011 |
| Priority date | — |
| Expiry date | Jan 20, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/44
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are techniques for compilation of hierarchical data processing. A data flow diagram including one or more operators, wherein each operator includes at least one of an incoming arc and an outgoing arc, is received. For each operator, for each incoming arc, it is validated that an arc input formal schema is compatible with a schema rooted in a context node in an arc input actual schema, and, for each outgoing arc, an arc output formal schema is computed based on operator logic and operator inputs and an arc output actual schema is computed from the arc input actual schema by replacing the context node of the arc input actual schema with the arc output formal schema.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.