Methods and systems for a memory section
US7941595B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2007 |
| Grant date | May 10, 2011 |
| Priority date | — |
| Expiry date | Sep 1, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/067
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A storage system that may include one or more memory devices, a memory interface device corresponding to one or more of the memory devices, which are organized in sections, and a section controller. In this system, a data request for the data may be received over a communications path by a section controller. The section controller determines the addresses in the memory devices storing the requested data, transfers these addresses to those memory devices storing the requested data, and transfers an identifier to the memory interface device. The memory device, in response, reads the data and transfers the data to its corresponding memory interface device. The memory interface device then adds to the data the identifier it received from the section controller and forwards the requested bits towards their destination, such that the data need not pass through the section controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.