Monolithic semiconductor switches and method for manufacturing
US7943955B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2009 |
| Grant date | May 17, 2011 |
| Priority date | — |
| Expiry date | Jan 27, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0195
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides one semiconductor die with a first and a second FET. One of source/drain of the first FET and one of source/drain of the second FET are electrically coupled to at least one contact area at a first side of one semiconductor die, respectively. The other one of source/drain of the first FET, a gate of the first FET, the other one of source/drain of the second FET and the gate of the second FET are electrically coupled to contact areas at a second side of the one semiconductor die opposite to the first side, respectively. The contact areas of the other one of source/drain of the first FET, of the gate of the first FET, of the other one of source/drain of the second FET and of the gate of the second FET are electrically separated from each other, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.