CMOS bias circuit
US7944255B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 21, 2009 |
| Grant date | May 17, 2011 |
| Priority date | — |
| Expiry date | Sep 21, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/24
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A CMOS bias circuit includes a starter circuits and a started circuit part which supplies a current to the outside. The starter circuits has a connection node (first terminal) between it and the started circuit part. The starter circuits includes a first MOS transistor connected at its drain to the first terminal, a first current supply circuit which supplies a starter current to the started circuit via the first MOS transistor, and a circuit which supplies a second current in a direction that interrupts a current flowing through the first MOS transistor to a node between the first MOS transistor and the first current supply circuit in accordance with a potential at the first terminal. The starter circuits has a function of preventing a current flowing between the drain and source of the first MOS transistor in the opposite direction by increasing or decreasing a gate bias of the first MOS transistor in accordance with a value of the second current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.