ADC with low-power sampling
US7944387B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 2010 |
| Grant date | May 17, 2011 |
| Priority date | — |
| Expiry date | Jan 14, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/804
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus for analog-to-digital conversion using successive approximation is provided, which is adapted to be supplied with a single ended supply voltage. The device includes: a first analog-to-digital conversion stage including a first set of capacitors coupled with a side at a common node and adapted to sample an input voltage and to be coupled to either a first reference voltage level or a second reference voltage level, at least one capacitor of the first set of capacitors being adapted to be left floating, a control stage being adapted to connect the at least one floating capacitor to the first reference voltage level or the second reference voltage level in response to an analog-to-digital conversion decision made by a second analog-to-digital conversion stage. The first analog-to-digital conversion stage is operable to couple the common node to a supply voltage level, in particular ground, during analog-to-digital conversion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.