Using a portion of differential signal line to provide an embedded common mode filter
US7944477B1 · kind B1 · utility
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14Claims
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Key dates
| Filing date | Jun 14, 2006 |
| Grant date | May 17, 2011 |
| Priority date | — |
| Expiry date | Mar 17, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01P3/026
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
In order to provide filtering of clock noise from an integrated circuit at least one differential signal line connected to the integrated circuit is provided with an embedded common mode filter. The common mode filter can be provided in the form of a hollowed out portion of an impedance reference plane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.