Integrated circuit structure
US7948060B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2008 |
| Grant date | May 24, 2011 |
| Priority date | — |
| Expiry date | Jun 22, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit and corresponding method of manufacture. The integrated circuit has a die comprising: an outer strengthening ring around a periphery of the die, the outer ring having one or more gaps; and an inner strengthening ring within the outer ring and around interior circuitry of the die, the inner ring having one or more gaps offset from the gaps of the outer ring. One or more conducting members are electrically isolated from said rings and electrically connected to the interior circuitry, each member passing through a gap of the inner ring and through a gap of the outer ring.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.