Digital communications test system for multiple input, multiple output (MIMO) systems
US7948254B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 2009 |
| Grant date | May 24, 2011 |
| Priority date | — |
| Expiry date | Jul 13, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B7/0413
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A digital communications test system and method for testing a plurality of devices under test (DUTs) in which multiple sets of a single vector signal analyzer (VSA) and single vector signal generator (VSG) can be used together to perform error vector magnitude (EVM) measurements for one or more DUTs in parallel, including one or more of composite, switched and multiple input multiple output (MIMO) EVM measurements. This allows N pairs of a VSA and VSG to test N DUTs with N×N MIMO in substantially the sane time as a single VSA and VSG pair can test a single DUT, thereby allowing a substantial increase in testing throughput as compared to that possible with only a single VSA and VSG set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.