Semiconductor arrangement and method for the measurement of a resistance

US7948258B2 · kind B2 · utility

Assignee

• austriamicrosystems AG

Inventor

• Alexander Costa · Graz, AT

Key dates

• Filing date: Mar 18, 2009
• Grant date: May 24, 2011
• Expiry date: Jun 25, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2224/13
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A semiconductor arrangement has a semiconductor body (CP), comprising a semiconductor layer (HL) with a first (AB11, AB12) and at least one second (AB21, AB22) conducting terminal areas, respectively made in two parts, and with a first (TAB1) and a second (TAB2) test terminals; a first (KI1, KU1) and at least one second (KI2, KU2) contact areas, located on the semiconductor body (CP) and made of two parts, which are connected with the respective terminal areas (AB11, AB12; AB21, AB22), and a first (TK1) and a second (TK2) test contact areas that are connected with the respective test terminal areas (TAB1, TAB2); a first terminal (10) that can be arranged on the semiconductor body (CP) and that contacts both parts of the two-part first contact areas (KI1, KU1), and at least one second terminal (20) that can be placed on the semiconductor body (CP) and that contacts both parts of the at least one second two-part contact area (KI2, KU2), and a first (30) and a second (40) test terminals, which can be arranged on the semiconductor body (CP). Moreover, a method is provided for the measurement of a resistance.