DC-offset cancelled programmable gain array for low-voltage wireless LAN system and method using the same
US7948309B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2009 |
| Grant date | May 24, 2011 |
| Priority date | — |
| Expiry date | Jan 16, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45644
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier circuit includes a transconductance amplifier at an input side of the amplifier circuit, a transimpedance amplifier connected to an output of the transconductance amplifier, and a voltage amplifier connected to an output of the transimpedance amplifier. The transconductance amplifier and the transimpedance amplifier form a low-impedance node at an interface thereof. A feedback circuit is connected between an output of the voltage amplifier and the low-impedance node between the transconductance amplifier and the transimpedance amplifier. The transconductance amplifier, the transimpedance amplifier, and the voltage amplifier form a main amplifier stage. The feedback circuit senses an imbalance in an output of the main amplifier stage, whereby a correction signal is integrated and negatively fed back to the low-impedance node between the transconductance amplifier and the transimpedance amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.