Class D amplifier circuit
US7948313B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2010 |
| Grant date | May 24, 2011 |
| Priority date | — |
| Expiry date | Mar 23, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/384
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A class D amplifier circuit includes a signal generation section that generates a first pulse width modulation signal and a second pulse width modulation signal based on an input signal. When a level of the input signal is zero, the signal generation section generates: the first pulse width modulation signal having a repeated first wide-width pulse signal portion, which has a wide width and a repeated first narrow-width pulse signal portion, which has a narrow width which is narrower than the wide width of the first wide-width pulse signal; and the second pulse width modulation signal having a repeated second narrow-width pulse signal portion, which has a narrow width and a repeated second wide-width pulse signal portion, which has a wide width which is wider than the narrow width of the second narrow-width pulse signal portion. A rising point in time of the second narrow-width pulse signal portion occurs after a rising point in time of the first wide-width pulse signal portion and a falling point in time of the second narrow-width pulse signal portion occurs before a falling point in time of the first wide-width pulse signal portion. A rising point in time of the first narrow-widt…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.