Power efficient multistage amplifier and design method
US7948324B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 2009 |
| Grant date | May 24, 2011 |
| Priority date | — |
| Expiry date | Aug 10, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multistage amplifier and design method are disclosed. The multistage amplifier has a plurality of amplifier stages, each stage having an amplifier designed and biased to operate at or near the amplifier's power added efficiency (PAE) peak. The PAE peak of each of the amplifier is at or near the amplifiers linear-compression transition region, providing a multistage power amplifier that is power efficient and has desirable amplitude to amplitude and amplitude to phase power transfer characteristics. The amplifier is designed by matching the output impedance of a final stage with a load. Amplifier stages are iteratively designed from the last stage to the first. At each stage, an amplifier and drive circuit are designed. The drive circuit and amplifier are designed to provide each stage with output impedance matched to the input impedance of the following stage and to operate at or near the PAE peak of the amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.