Nonvolatile semiconductor memory device and method for operating the same
US7948797B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2009 |
| Grant date | May 24, 2011 |
| Priority date | — |
| Expiry date | Nov 8, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile semiconductor memory device comprises: a memory cell array including a plurality of memory cell units each including memory cells, a plurality of bit lines, and a common source line; a sense amplifier operative to read data from a selected memory cell; a control circuit operative to control a read operation of the sense amplifier; and a cell source monitoring circuit operative to detect a voltage of the common source line, compare the detected voltage of the common source line with a reference voltage, and output a read control signal. The sense amplifier is configured to read data from the selected memory cell through at least two cycles. The control circuit is configured to perform control to determine whether the data reading is to be ended after a first reading cycle or a second reading cycle is to be carried out, based on the read control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.