Main processor initiating command timing signal via DMA to coprocessor in order to synchronize execution of instructions
US7949801B2 · kind B2 · utility
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8References
7Claims
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Key dates
| Filing date | Jun 30, 2007 |
| Grant date | May 24, 2011 |
| Priority date | — |
| Expiry date | Feb 18, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Coprocessor systems for using a main microprocessor DMA channel to write to a port to control a coprocessor system are provided. In certain examples, coprocessor systems are described using a main CPU counter to trigger a DMA channel to perform a single byte transfer to a port used to control coprocessor command timing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.