Method of treating and probing a via
US7954693B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 1, 2008 |
| Grant date | Jun 7, 2011 |
| Priority date | — |
| Expiry date | Nov 1, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/167
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of treating a via connected with a substrate and a method of probing the via are disclosed. A pattern of a lead-free solder paste is applied around a hole of the via without completely covering a pad of the via. The paste is reflowed to form a pattern of a lead-free solder on a pad that covers only a portion of a surface area of the pad and is positioned around the hole. The solder may be substantially symmetrically positioned around the hole. A flux generated during reflow is insufficient to plug the hole. The lead-free solder can be probed by a blade probe including collinear first and second edges and having a preferred orientation relative to the pattern of the lead-free solder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.