Dry etch stop process for eliminating electrical shorting in MRAM device structures
US7955870B2 · kind B2 · utility
16Cited by
2References
37Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 2, 2009 |
| Grant date | Jun 7, 2011 |
| Priority date | — |
| Expiry date | Sep 2, 2029 |
Classification
- Technology area (CPC A)Human Necessities
- CPC primaryA61P43/00
- WIPO fieldPharmaceuticals
- WIPO sectorChemistry
Abstract
The present invention relates generally to semiconductor fabrication and particularly to fabricating magnetic tunnel junction devices. In particular, this invention relates to a method for using the dielectric layer in tunnel junctions as an etch stop layer to eliminate electrical shorting that can result from the patterning process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.