Separation type unit pixel having 3D structure for image sensor
US7956394B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 29, 2006 |
| Grant date | Jun 7, 2011 |
| Priority date | — |
| Expiry date | Dec 19, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/806
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A separation type unit pixel having a 3D structure for an image sensor, composed of a plurality of transistors, includes: a first wafer which includes a photodiode, a transfer transistor, a node of a floating diffusion area functioning as static electricity for converting electric charge into a voltage, and a pad connecting the floating diffusion area and the transfer transistor to an external circuit, respectively; a second wafer which includes the rest of the circuit elements constituting a pixel (i.e., a reset transistor, a source-follower transistor, and a blocking switch transistor), a read-out circuit, a vertical/horizontal decoder, a correlated double sampling (CDS) circuit which involves in a sensor operation and an image quality, an analog circuit, an analog-digital converter (ADC), a digital circuit, and a pad connecting each pixel; and a connecting means which connects the pad of the first wafer and the pad of the second wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.