Multi-channel fractional clock data transfer
US7958284B2 · kind B2 · utility
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30Claims
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Assignee
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Key dates
| Filing date | Feb 28, 2006 |
| Grant date | Jun 7, 2011 |
| Priority date | — |
| Expiry date | Jan 26, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/005
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus to transfer data between one or more clock domains are described. In one embodiment, a plurality of signals corresponding to write pointers of a buffer and a read pointer of the buffer are generated. The signals corresponding to the write pointers of the buffer are to be generated based on different data patterns for transmission over different channels. Other embodiments are also claimed and described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.