Multi-channel LDPC decoder architecture
US7958424B2 · kind B2 · utility
4Cited by
16References
21Claims
0Family size
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Key dates
| Filing date | Dec 16, 2005 |
| Grant date | Jun 7, 2011 |
| Priority date | — |
| Expiry date | Mar 9, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6561
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multi-channel decoder system has a decoder core at least a portion of which is configurable as a LDPC decoder that, during decoding processing, divides check nodes of a node representation of a LDPC code into a plurality of groups, and, during an iteration, sequentially processes the groups while processing in parallel the check nodes within each group, thus improving decoding throughput.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.