Strained quantum-well semiconductor devices
US7960755B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2004 |
| Grant date | Jun 14, 2011 |
| Priority date | — |
| Expiry date | Aug 6, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/05
Abstract
In a transistor in which the majority carriers are holes, at least one narrow bandgap region or layer is doped p-type or contains an excess of holes and is subject to compressive mechanical strain, whereby hole mobility may be significantly increased. In a p-channel quantum well FET, the quantum well InSb well p-type layer 5 (modulation or directly doped) lies between In1-xAlxSb layers 4, 6 where x is of a value sufficient to induce strain in layer 5 to an extent that light and heavy holes are separated by much more than kT. Transistors falling within the invention, including bipolar pnp devices, may be used with their more conventional electron majority carriers counterparts in complementary logic circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.