Integrated circuit layout pattern for cross-coupled circuits

US7960759B2 · kind B2 · utility

Assignee

• Arm Limited · GB

Inventors

• Marlin Wayne Frederick, Jr. · Austin, US
• David P. Clark · Mineral Wells, US

Key dates

• Filing date: Oct 14, 2008
• Grant date: Jun 14, 2011
• Expiry date: Sep 24, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/519

Abstract

A circuit 32 is provided comprising a first diffusion region 34 and a parallel second diffusion region 36. A sequence of N gate layers 40, 42, 46 is provided with a first and an Nth of these gate layers covering different respective ones of the diffusion regions 34, 36 whilst the middle (N−2) gate layers 42 cover both diffusion regions 34, 36. A bridging conductor 64 connects the first gate layer 40 and the Nth gate layer 46. In some embodiments, the second diffusion region is provided as two second diffusion sub-regions 68, 70 having a diffusion region gap 74 therebetween and electrically connected via a jumper connector 42. A first gate layer 76 which forms a gate electrode with a first diffusion region 66 can extend through this diffusion region gap 74 not forming a gate electrode therewith and facilitating use of a collinear bridging conductor 82 to connect to the Nth gate layer 80.