3D backside illuminated image sensor with multiplexed pixel structure
US7960768B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 17, 2008 |
| Grant date | Jun 14, 2011 |
| Priority date | — |
| Expiry date | Sep 13, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/813
Abstract
A three-dimensional pixel array, a method of manufacturing a pixel array and an imager including the three-dimensional pixel array. The three-dimensional array includes multiple groups of pixels, each group of pixels including a first layer and a second layer. The first layer includes multiple photosensitive elements, one per pixel in the group, at least one floating diffusion region connected to each photosensitive element in the group via at least one respective transfer gate per pixel and multiple transfer gate lines, at least two transfer gate lines connected to each respective transfer gate in each row of pixels. The second layer includes at least a rest transistor per group and a source follower transistor coupled to the shared floating diffusion in the first layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.