Impedance matching circuit and method
US7961000B1 · kind B1 · utility
6Cited by
9References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 29, 2005 |
| Grant date | Jun 14, 2011 |
| Priority date | — |
| Expiry date | May 30, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0278
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An impedance matching circuit has a number of buffers each having a variable impedance circuit. A variable impedance sense control block has an impedance code as an output. A sequencing circuit couples the impedance code of the variable impedance sense control block to the variable impedance circuit of each of the buffers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.