Expander circuit with reduced distortion
US7961896B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 28, 2006 |
| Grant date | Jun 14, 2011 |
| Priority date | — |
| Expiry date | Feb 15, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G9/025
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems for an expander circuit are disclosed. An expander circuit comprising a transmit amplifier for amplifying electrical signals received from a microphone. A rectifier circuit is responsive to the electrical signals and generates a D.C. voltage. A dynamic resistor circuit is coupled to the transmit amplifier for regulating the gain of the transmit amplifier. The dynamic resistor circuit includes a bipolar junction transistor for receiving the D.C. voltage. The bipolar junction transistor is operated such that the collector current is zero and the bipolar junction transistor has a variable impedance seen by the transmit amplifier dependent upon the D.C. voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.