Method and apparatus for accessing a data bus to transfer data over the data bus
US7962673B2 · kind B2 · utility
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16References
11Claims
0Family size
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Key dates
| Filing date | Jun 3, 2008 |
| Grant date | Jun 14, 2011 |
| Priority date | — |
| Expiry date | Jun 30, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for intervaled memory transfer access provides periodic authorization signals to a memory access controller. The method cycles between: 1) inhibiting the memory access controller from writing data to a memory until the memory access controller receives a periodic authorization signal to cause the memory access controller to remove the inhibition and write a predetermined amount of data to the memory through a data bus, and 2) releasing the data bus following writing of the predetermined amount of data to the memory by inhibiting the memory access controller from writing further data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.