Memory devices comprising nano region embedded dielectric layers
US7964908B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2008 |
| Grant date | Jun 21, 2011 |
| Priority date | — |
| Expiry date | Jul 14, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28194
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one aspect, a memory cell includes a plurality of dielectric layers located within a charge storage gate structure. At least one of the dielectric layers includes an dielectric material including oxygen, and nano regions including oxygen embedded in the dielectric material, where an oxygen concentration of the dielectric material is the greater than an oxygen concentration of the nano regions. In another aspect, at least one of the dielectric layers includes a dielectric material and nano regions embedded in the dielectric material, where an atomic composition of the dielectric material is the same as the atomic composition of the nano regions, and a density of the dielectric material is the greater than a density of the nano regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.