Semiconductor device having a DMOS structure
US7964915B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2007 |
| Grant date | Jun 21, 2011 |
| Priority date | — |
| Expiry date | Feb 21, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/151
Abstract
The invention provides a high voltage MOS transistor having a high source/drain breakdown voltage of about 300V and a low on-resistance. An N-type body layer is formed extending from a source layer side to under a gate electrode. A P-type second drift layer is formed in an epitaxial semiconductor layer by being diffused deeper than a first drift layer, extending from under the first drift layer to under the gate electrode and forming a PN junction with the body layer under the gate electrode. A surface of the body layer between this second drift layer and the source layer serves as a channel region. The first drift layer is formed at a distance from a left end of the gate electrode where electric field concentration easily occurs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.