QoS measurement with split-path zero-latency virtual jitter buffer
US7965627B2 · kind B2 · utility
2Cited by
4References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2005 |
| Grant date | Jun 21, 2011 |
| Priority date | — |
| Expiry date | Jul 11, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M7/0084
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An apparatus that includes a packet data ingress, a packet data egress, and a packet data switching matrix configured to switch packet data from the packet data ingress to the packet data egress. The apparatus may further include a packet data jitter buffer and a packet data splitter, wherein the packet data splitter interposes the packet data ingress and the packet data switching matrix and is configured to multicast the packet data to the packet data switching matrix and the jitter buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.