Memory system and method for operating a memory system
US7966469B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2006 |
| Grant date | Jun 21, 2011 |
| Priority date | — |
| Expiry date | Dec 20, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system, in particular a buffered memory system, e.g., a fully buffered memory system, a method for operating a memory system, and a device for use with a memory system is disclosed. The memory system may include a first buffered memory module, and a second buffered memory module, wherein the first and the second buffered memory modules are adapted to be accessed in parallel. According to a further embodiment of the invention, a device is provided which is adapted to map consecutive accesses to the first or the second memory module to a parallel access of both the first and the second memory module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.