Patent · US Active

Method and system for approximate placement in electronic designs

US7966595B1 · kind B1 · utility

12Cited by
6References
38Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 13, 2007
Grant dateJun 21, 2011
Priority date
Expiry dateApr 19, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/392
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Disclosed are method, system, and computer program product for a method and system for a fast and stable placement/floorplanning method that gives consistent and good quality results. Various embodiments of the present invention provide a method and system for approximate placement of various standard cells, macro-blocks, and I/O pads for the design of integrated circuits by approximating the final shapes of the objects of interest by one or more probability distribution functions over the areas for the objects of interest with improved runtime and very good stability. These probability distributions are gradually localized to final shapes satisfying the placement constraints and optimizing an objective function.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.