Chip attack protection
US7966666B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2006 |
| Grant date | Jun 21, 2011 |
| Priority date | — |
| Expiry date | Jan 14, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system for protecting a chip with an integrated circuit disposed on a first surface, the system including, disposed on the first surface, a first antenna, signal analyzer, chip controller and a signal generator which is operative to supply an outbound signal for transmission by the first antenna, a circuit arrangement, disposed on a second surface of the chip, including a shielding arrangement and a second antenna to receive the outbound signal, the circuit arrangement being operative to transmit a return signal from the second antenna to the first antenna, such that a breach in the shielding arrangement results in a change in, or cessation of, the return signal for detection by the signal analyzer, and a chip controller disposed on the first surface being operative to perform an action on the integrated circuit in response to the detection of the breach. Related apparatus and methods also included.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.