Charge pump linearization technique for delta-sigma fractional-N synthesizers
US7969247B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2009 |
| Grant date | Jun 28, 2011 |
| Priority date | — |
| Expiry date | Aug 27, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1976
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A delta-sigma fractional-N frequency synthesizer having a charge pump with error canceling circuitry eliminates a non-linear term from the charge pump transfer function. The charge pump includes a matched pair of charging current sources, each supplying a first current IP1 to a common node, when enabled. The charge pump also includes a matched pair of discharging current sources, each sinking a second current IN1 from the common node, when enabled. The error canceling circuitry includes a charging current source, which supplies a current equal to the second current IN1 to the common node, when enabled. The error canceling circuitry also includes a discharging current source, which sinks a current equal to the first current IP1 from the common node, when enabled. The charging and discharging current sources of the error canceling circuitry are both enabled when either one of the matched pairs of charging and discharging current sources is enabled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.