Systems and methods for writing to a memory

US7969806B2 · kind B2 · utility

Assignee

• Qimonda AG · DE

Inventors

• Luca De Ambroggi · Dresden, DE
• Jens Egerer · Birkenfeld, DE
• Peter Schroegmeier · Birkenfeld, DE

Key dates

• Filing date: Apr 28, 2008
• Grant date: Jun 28, 2011
• Expiry date: Aug 18, 2029

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C2213/32
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

An integrated circuit includes memory segments, each having at least one memory cell configurable in first and second states to store data, and a controller that controls programming and erasing of the memory segments. The controller maps external memory addresses of write data to internal memory addresses of erased memory segments with no memory cells in the first state such that erased memory segments are programmed with write data. When a write access occurs for an external memory address previously mapped to an internal memory address of a programmed memory segment with at least one memory cell in the first state, the controller remaps the external memory address to another internal memory address of an erased memory segment. The controller identifies programmed memory segments to be erased and controls selective erasure of the identified programmed memory segments, such as programmed memory segments no longer mapped to an external memory address.