System and method for fast platform hibernate and resume
US7971081B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2007 |
| Grant date | Jun 28, 2011 |
| Priority date | — |
| Expiry date | Nov 7, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In some embodiments, an apparatus includes processor cores, a smaller non-volatile memory, a larger non-volatile memory to hold an operating system, programs, and data for use by the processor cores. The apparatus also includes volatile memory to act as system memory for the processor cores, and power management logic to control at least some aspects of power management. In response to a power state change command, a system context is stored in the smaller non-volatile memory followed by the volatile memory losing power, and in response to a resume command, the volatile memory receives power and receives at least a portion of the system context from the smaller non-volatile memory. Other embodiments are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.