Non-volatile memory device and method of manufacturing the same
US7972923B2 · kind B2 · utility
1Cited by
4References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2006 |
| Grant date | Jul 5, 2011 |
| Priority date | — |
| Expiry date | May 5, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0411
Abstract
A semiconductor device may include a tunnel insulating layer disposed on an active region of a substrate, field insulating patterns disposed in surface portions of the substrate to define the active region, each of the field insulating patterns having an upper recess formed at an upper surface portion thereof, a stacked structure disposed on the tunnel insulating layer, and impurity diffusion regions disposed at surface portions of the active region adjacent to the stacked structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.