Setting memory device VREF in a memory controller and memory device interface in a communication bus
US7974141B2 · kind B2 · utility
9Cited by
15References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2009 |
| Grant date | Jul 5, 2011 |
| Priority date | — |
| Expiry date | Dec 28, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device is connected through an interface to a memory controller. The memory device's reference voltage is set based on a driver's impedance of the memory device and the controller driver drive strength during driver training. The voltage is applied to a reference resistor pair at the memory device and changed until the voltage level switches. The voltage is then set at the reference resistor pair of the memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.