Virtual interrupt processing in a layered virtualization architecture
US7975267B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Mar 30, 2007 |
| Grant date | Jul 5, 2011 |
| Priority date | — |
| Expiry date | Sep 21, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2009/45566
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of apparatuses, methods, and systems for processing virtual interrupts in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes virtual machine entry logic, recognition logic, and evaluation logic. The virtual machine entry logic is to transfer control of the apparatus from a host to a guest. The recognition logic is to recognize a virtual interrupt request. The evaluation logic is to determine whether to transfer control from the guest to an intervening monitor in response to the virtual interrupt request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.