Patent · US Active

SONOS flash memory

US7977734B2 · kind B2 · utility

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10References
1Claims
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Key dates

Filing dateJul 14, 2009
Grant dateJul 12, 2011
Priority date
Expiry dateAug 6, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/037

Abstract

A method for fabricating a silicon-oxide-nitride-oxide-silicon (SONOS) flash memory, comprising: preparing a silicon substrate including a silicon oxide-silicon nitride-silicon oxide (ONO) layer, a first polysilicon layer and a first etch stop layer in sequence; etching the first etch stop layer along a direction of bit line; selectively etching the first polysilicon layer with the first etch stop layer as a mask, till the silicon oxide-silicon nitride-silicon oxide (ONO) layer is exposed, the etched first polysilicon layer having an inverse trapezia section along a direction of word line; filling a dielectic layer between portions of the first polysilicon layer, the dielectric layer having a trapezia section along the direction of word line. After the above steps, it becomes easy to remove the portion of the first polysilicon layer on a sidewall of the dielectric layer by vertical etching. Thus, no polysilicon residue will be formed on the sidewall of the dielectric layer. Thereby, the short circuit between different memory cells may be avoided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.