High-speed multi-stage voltage comparator
US7977979B2 · kind B2 · utility
9Cited by
19References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2009 |
| Grant date | Jul 12, 2011 |
| Priority date | — |
| Expiry date | Sep 3, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45212
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high-speed multi-stage voltage comparator is provided. The multi-stage voltage comparator is configured to eliminate offset from outputs of preamplifiers through respective offset-cancellation switches, and to reset the outputs of the preamplifiers through respective reset switches to reduce an output recovery time. Thus, the multi-stage voltage comparator operates with high accuracy and at a high speed, so that it can be usefully applied to an analog-to-digital converter (ADC), and particularly, a high-speed successive approximation register ADC (SAR ADC).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.