Systems and methods for improving packet scheduling accuracy
US7978609B2 · kind B2 · utility
3Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 22, 2009 |
| Grant date | Jul 12, 2011 |
| Priority date | — |
| Expiry date | Aug 1, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/6265
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A packet scheduler is configured to perform quality of service (QoS) scheduling on a per-data unit basis. A downstream processing engine is operatively connected to the packet scheduler for receiving forwarded packets. A feedback path is operatively connected between the downstream processing engine and the packet scheduler for transmitting a net data unit change value reflecting a change in packet size between an output of the packet scheduler and an output of the downstream processing engine.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.