Electrostatic discharge protection device

US7986011B2 · kind B2 · utility

Assignee

• NXP B.V. · NL

Inventors

• Fabrice Blanc · Vinay, FR
• Frédéric Barbier · Grenoble, FR

Key dates

• Filing date: Oct 5, 2006
• Grant date: Jul 26, 2011
• Expiry date: Jun 17, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002

Abstract

The invention provides an electrostatic discharge (ESD) protection device with an increased capability to discharge ESD generated current with a reduced device area. The ESD protection device comprises a grounded gate MOS transistor (1) with a source region (3) and a drain region (4) of a first semiconductor type interposed by a first well region (7) of a second semiconductor type. Second well regions (6) of the first semiconductor type, interposed by the first well region (7), are provided beneath the source region (3) and the drain region (4). Heavily doped buried regions (8,9) of the same semiconductor types, respectively, as the adjoining well regions (6,7) are provided beneath the well regions (6,7).