Apparatus, system, and method for adjusting memory hold time
US7987334B2 · kind B2 · utility
1Cited by
7References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 28, 2008 |
| Grant date | Jul 26, 2011 |
| Priority date | — |
| Expiry date | Dec 27, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus, system, and method are disclosed for adjusting memory hold time. A detection module detects a hold time violation for a memory. An adjustment module increases a first voltage of a voltage controller in response to the hold time violation. The voltage controller supplies electrical current at the first voltage to a memory controller and at a reference voltage to the memory. The first and reference voltages are set independently.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.